To be fair I think BRN took their cue from IBM's TrueNorth in terms of optimising their claims. I have always assumed the number of synapses to be 100,000x100,000 ie 10bn POSSIBLE connections. they cannot all be active at once ie EVERY neuron cannot be connected to EVERY OTHER neuron simultaneously (and of naturally it would make exactly zero sense to build in that much capacity since it would never remotely be used). This in turn relates to whether the true number of neurons on a single chip is 100k odd or 1.2million, which they BRN (and as i recall IBM) have expressed both ways in the past with a bit of technological sleight of hand going on re the definition of a Neuron, but as far as synaptic connections are concerned I have assumed the effective figure is circa 100k Neurons.
As far as accelerator goes there has never been any secret about it being implemented on a Xilinx FGPA, indeed BRN included an approving quote from Xilinx with the PR announcing it's release.
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