using SiOx ReRAM
Weebit Nano, the semiconductor company seeking to develop and commercialise the next generation of memory technology, and the Technion (Israel Institute of Technology) have agreed to examine the possible use of ReRAM memories in a novel computing architecture that could speed up processing, memory transfer rate and memory bandwidth, and decrease processing latency – while using much less power.
Weebit Nano (ASX: WBT), the semiconductor company seeking to develop and commercialise the next generation of memory technology, and the Technion (Israel Institute of Technology) have agreed to examine the possible use of ReRAM memories in a novel computing architecture that could speed up processing, memory transfer rate and memory bandwidth, and decrease processing latency – while using much less power.
Weebit Nano and a team at the Technion, led by Professor Shahar Kvatinsky, a pioneer in the field of circuits and architectures with emerging memory technologies and design of energy efficient architectures, will perform characterisation and implementation of logic operations using Weebit’s SiOx ReRAM test chips, demonstrating basic logic operations on a ReRAM array using the Technion’s MAGIC (Memristor Aided Logic) technique implementing ‘Real Processing in Memory’, or Real PIM.
Although ReRAM technology is targeted for next generation memory devices, there is a huge potential for ReRAM to be used as logic circuits to revolutionise current computing architectures. Traditional computing architectures (’von Neumann’ architectures) have a clear distinction between processing and memory. The memory component and the central processing unit (CPUs) are separate devices, with the memory serving only as ’dumb’ storage from which the CPU reads and writes. These ’read’ and ’write’ transactions require significant amounts of time and energy, increasing the power consumption of the chip and being relatively slow.
However, Real PIM uses ReRAM elements as ‘logic gates’, allowing the computer to perform logical operations inside the memory on the same devices that store data, that is, the computer can perform computation inside the ReRAM arrays rather than in the CPU. This is much faster and uses up to 1,000-times less power by avoiding the need to export and import data between the memory chip and CPU.
Professor Shahar Kvatinsky, said: “We, at the Technion, have been investigating Real Processing-inMemory for several years. Our MAGIC technique utilises the unique characteristics of emerging memories such as ReRAM where the same cells can be used for both memory and logic. We are very proud to co-operate with Weebit, a leader in the ReRAM domain, on this research and to use their test chips as the basis for the research.”
Coby Hanoch, CEO of Weebit Nano, said: “Weebit is constantly looking for opportunities to utilise our ReRAM in the most advanced and innovative fields. We believe that ReRAM, in addition to being the next generation memory element, will also be a part of the computing revolution enabling novel architectures mixing logic and memory to allow significantly power efficient Real Processing-In-Memory computing. We believe that by collaborating on this with the Technion, one of the leading research institutes in this domain, we can better prepare for yet another use for our unique SiOx ReRAM technology."
(20min delay)
