“However, high-speed operations cause high power consumption and...

“However, high-speed operations cause high power consumption and chip temperature increase, which can deteriorate NAND reliability. Hence, reduction of operating voltage is inevitable to achieve the future NAND. Opportunities for the use of 3-D as well as polymer memory design in modern electronic circuits are rapidly expanding, based on the very high performance and unique functionality. However, their practical implementation in electronic applications will ultimately be decided by the ability to produce devices and circuits at a cost that is significantly below that needed to manufacture conventional electronic circuits based on, for example, silicon.”

“An embedded nonvolatile memory with superior performance to Flash could see widespread adoption in system-on-chip (SoC) applications such as smart cards and microcontrollers.”

https://www.ncbi.nlm.nih.gov/pmc/articles/PMC4182445/



https://weebit-nano.com/wp-content/uploads/2018/05/may-presentation.pdf

All that a successful replacement for Flash needs to do for the next decade or two is be 1000 x faster at the lowest cost.

The above slide is from May 2018.

WBT has achieved its 1MB array and is now moving to 28nm.

Ability to scale to 1GB is implied according to TMT Analytics https://www.weebit-nano.com/wp-content/uploads/2017/10/WBT-company-report-191017-1.pdf

WBT is strides ahead with development and does not fail the cost benefit analysis like others. Remember, if Intel can’t do it cost-effectively without silicon perhaps no-one can (for the next 2 decades).

A lot get caught up in the theory of what’s better but theories not grounded in commercial reality will leave investors kicking and screaming like 4DS investors were when its first iteration did not succeed in Sep.

Opinion only, dyor etc